1. Field of the Invention
The present invention relates to a vertical-cavity surface-emitting semiconductor laser, and more particularly, to a vertical-cavity surface-emitting semiconductor laser continuously oscillating at low threshold voltages.
2. Description of the Related Art
The vertical-cavity surface-emitting semiconductor laser (hereinafter, referred to as "VCSEL"), which is one of the key devices for optical data processing, optical interconnection or the like, has been increasingly studied and developed. The VCSEL consists of an active region (oscillation wavelength: .lambda.), serving as a light emitting section, and of distributed Bragg reflectors (DBRs) made of semiconductors or dielectric materials and located on the top and bottom of the active region. The DBR has a film thickness of .lambda./4, and consists of a multi-layered film composed of stacks of two kinds of alternating dielectric layers having refractive indexes different from each other. Because of the convenience of the fabrication of the device, thermal conductivity and the like, a DBR made of semiconductor is mainly used. Through such layers, a current is injected into the active region sandwiched by a pair of p-type and n-type DBRs, so that a laser beam is oscillated from the active region.
In the VCSEL made of a GaAs-type semiconductor of a short wavelength, when forming the DBR by using GaAs layers and AlAs layers, due to the large difference of refractive index between the GaAs and AlAs layers, a DBR with the highest reflection efficiency can be formed. However, there is a problem in that, in the hetero junction portion formed between the GaAs and AlAs layers of a p-type DBR, the spike of the valence band arising due to the difference of the bandgap and the differences of electron affinity becomes maximized, which results in an increase in electric resistance. This is a problem common to all types of the VCSEL having the above-mentioned structure. For example, it has been proposed to solve this problem by introducing a grated layer onto the hetero interface (e.g., IEEE Photonics Technology Letters, 2(1990) PP. 234-236).
However, the proposed solution would require structure of the device to be more complicated. In addition, by obtaining such a structure of the device, the shutter of the MBE (Molecular Beam Epitaxy) device would have to be opened several hundred to several thousand times. So, there would be a problem in that the MBE device is likely have other troubles.
There is a report that the DBR made of p-type GaAs/AlGaAs of which the Al composition ratio is 0.6 or less is free from the problem of high resistance caused by the spike (e.g., IEEE Photonics Technology Letters, 4(1990) PP. 1325-1327). However, the difference of the refractive index between the AlGaAs layer of which Al composition ratio is 0.6 or less and the GaAs layer is small. Accordingly, in order to make the device serve as a DBR, it is necessary to increase the number of pairs of the AlGaAs and GaAs layers.
On the other hand, a method for realizing the device of low resistance by the structure which can be obtained relatively easily is disclosed in Japanese Laid-Open Patent Publication No. 5-235464. This conventional VCSEL 610 will be described with reference to FIG. 12. In the VCSEL 610, a p-type mirror 604 made of GaAs/AlAs is formed on a GaAs substrate 605. On the p-type mirror 604, an electrode 606 is formed. On a part of the top face of the p-type mirror 604, an active layer 603 consisting of an In.sub.0.2 Ga.sub.0.8 As strained super lattice layer is formed. Furthermore, on the top of the active layer 603, an n-type mirror 602 made of GaAs/AlAs is formed. Also on the n-type mirror 602, an electrode 601 is formed. A laser beam 607 generated in the active layer 603 is emitted to the outside through the GaAs substrate 605.
In the VCSEL 610, the current flowing through the active layer 603 spreads all over the p-type mirror 604. As shown in FIG. 12, the active layer 603 is formed on only a part of the upper face of the p-type mirror 604. In general, the resistance is inversely proportional to the area of the cross section of a current path. Accordingly, the resistance of the p-type mirror 604 decreases by expanding the current path.
Incidentally, Japanese Laid-Open Patent Publication No. 4-188885 discloses a VCSEL 720 having the structure as shown in FIG. 13.
The VCSEL 720 has a semiconductor structure in which an n-type GaAs buffer layer 703, a DBR mirror 704, an n-type Al.sub.0.1 Ga.sub.0.9 As current introduction layer 705, a p-type GaAs active layer 706, a p-type Al.sub.0.4 Ga.sub.0.6 As cladding layer 707, and a p-type Al.sub.0.1 Ga.sub.0.9 As contact layer 708 are layered in this order on an n-type GaAs substrate 702. The p-type Al.sub.0.1 Ga.sub.0.9 As contact layer 708 and the p-type GaAs active layer 706 and a part of the n-type Al.sub.0.1 Ga.sub.0.9 As current introduction layer 705 are etched to be cylindrical. The space around the cylinder is filled with a ZnS.sub.0.06 Se.sub.0.94 layer 709. Furthermore, on the surface of the cylinder and the layer 709, an SiO.sub.2 /.alpha.-Si dielectric multilayer film 711 and a p-type ohmic electrode 710 are formed. On the surface of the n-type current introduction layer 705, an n-type ohmic electrode 701 is formed.
FIG. 14 schematically shows the path of the current flowing within the VCSEL 720 shown in FIG. 13. As shown in FIG. 13, a current 712 flowing through the active layer 706 does not flow into the DBR mirror 704 but solely into the current introduction layer 705. Hence, the problem of the high resistance in the hetero junction portion of the mirror can be prevented in principle. Thus, it is possible to provide a VCSEL of a low resistance.
In the conventional VCSEL 610, by using the p-type mirror 604 as a lower mirror and making the area of the p-type mirror 604 larger than that of the active layer 603, the forward threshold voltage can be greatly reduced from about 45 V to about 2 V. However, the serial resistance is large, and the operational voltage is still high. As a result, the VCSEL 610 can perform only the pulse oscillation at room temperatures.
Accordingly, in order to make the VCSEL continuously oscillate at a room temperature, it is required to further reduce the resistance of the p-type mirror.
On the other hand, the conventional VCSEL 720 is provided with the current introduction layer 705 for reducing the resistance, thus being configured so as not to allow the current to flow into the DBR mirror 704. In such a configuration, it is most important to reduce the sheet resistance of the current introduction layer 705. However, because the current introduction layer 705 has a thickness of about 100 nm, the sheet resistance cannot be sufficiently reduced. Also, since the current introduction layer 705 is not thick enough, it is difficult to form an ohmic contact of a low resistance between the n-type ohmic electrode 701 and the current introduction layer 705. Consequently, the resultant VCSEL cannot have a low resistance.
The present invention can solve the above-mentioned problems associated with a conventional VCSEL, and provide a VCSEL with a low resistance.